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BlueNRG1_i2c.c
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1
22 /* Includes ------------------------------------------------------------------*/
23 #include "BlueNRG1_i2c.h"
24
25
46 /* I2C Standard mode */
47 #define I2C_CR_SM_STD (0x0)
48
49 /* I2C Fast mode */
50 #define I2C_CR_SM_FAST (0x1)
51
52 #define I2C_CLOCK (16000000)
53
54 #define I2C_SLAVE_ADDR_EXT10_SMK (0x03FF)
55
56
72 static __I uint16_t Foncycles[4] = {1, 3, 4, 6};
73
96 void I2C_DeInit(I2C_Type* I2Cx)
97 {
98 /* Check the parameters */
99 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
100
101 /* Generate a stop condition */
102 I2Cx->CR_b.FS_1 = SET;
103
104 /* Disable the selected I2C peripheral / software reset */
105 I2Cx->CR_b.PE = RESET;
106 }
107
108
117 void I2C_Init(I2C_Type* I2Cx, I2C_InitType* I2C_InitStruct)
118 {
119 uint16_t foncycle;
120 uint32_t brcnt;
121
122 /* Check the parameters */
123 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
124 assert_param(IS_I2C_CLOCK_SPEED_I2C(I2C_InitStruct->I2C_ClockSpeed));
125 assert_param(IS_I2C_OPERATING_MODE(I2C_InitStruct->I2C_OperatingMode));
126 assert_param(IS_I2C_FILTERING(I2C_InitStruct->I2C_Filtering));
127 assert_param(IS_I2C_OWN_ADDRESS1(I2C_InitStruct->I2C_OwnAddress1));
128 assert_param(IS_FUNCTIONAL_STATE(I2C_InitStruct->I2C_ExtendAddress));
129
130 /* Disable the selected I2C peripheral / software reset */
131 I2Cx->CR_b.PE = RESET;
132
133 /* Select the digital filtering */
134 I2Cx->CR_b.FON = I2C_InitStruct->I2C_Filtering;
135
136 /* Clock rate computation */
137 foncycle = Foncycles[I2C_InitStruct->I2C_Filtering];
138 brcnt = I2C_CLOCK - I2C_InitStruct->I2C_ClockSpeed * foncycle;
139
140 /* Configure speed in standard mode */
141 if (I2C_InitStruct->I2C_ClockSpeed <= 100000)
142 {
143 brcnt /= (I2C_InitStruct->I2C_ClockSpeed << 1);
144
145 I2Cx->CR_b.SM = I2C_CR_SM_STD;
146
147 /* @16MHz 0x0003=>250ns */
148 I2Cx->SCR_b.SLSU = 0x003;
149 }
150 /* Configure speed in fast mode */
151 else if (I2C_InitStruct->I2C_ClockSpeed <= 400000)
152 {
153 brcnt /= (I2C_InitStruct->I2C_ClockSpeed * 3);
154
155 I2Cx->CR_b.SM = I2C_CR_SM_FAST;
156
157 /* @16MHz 0x0002=>125ns */
158 I2Cx->SCR_b.SLSU = 0x0002;
159 }
160
161 /* Set I2C own address */
162 MODIFY_REG(I2Cx->SCR, I2C_SLAVE_ADDR_EXT10_SMK, I2C_InitStruct->I2C_OwnAddress1);
163
164 /* Configure the baud rate */
165 I2Cx->BRCR_b.BRCNT = (uint16_t)brcnt;
166
167 /* Configure the operating mode */
168 I2Cx->CR_b.OM = I2C_InitStruct->I2C_OperatingMode;
169
170 if(I2C_InitStruct->I2C_ExtendAddress == ENABLE) {
171 I2Cx->CR_b.SAM = SET;
172 }
173 else {
174 I2Cx->CR_b.SAM = RESET;
175 }
176
177 /* Enable the selected I2C peripheral */
178 I2Cx->CR_b.PE = SET;
179 }
180
181
187 void I2C_StructInit(I2C_InitType* I2C_InitStruct)
188 {
189 /*---------------- Reset I2C init structure parameters values ----------------*/
190 /* initialize the I2C_ClockSpeed member */
191 I2C_InitStruct->I2C_ClockSpeed = 5000;
192
193 /* initialize the I2C_OperatingMode member */
194 I2C_InitStruct->I2C_OperatingMode = I2C_OperatingMode_Slave;
195
196 /* initialize the I2C_Filtering member */
197 I2C_InitStruct->I2C_Filtering = I2C_Filtering_Off;
198
199 /* Initialize the I2C_OwnAddress1 member */
200 I2C_InitStruct->I2C_OwnAddress1 = 0;
201
202 /* Initialize the I2C_AddressingMode member */
203 I2C_InitStruct->I2C_ExtendAddress = DISABLE;
204 }
205
213 void I2C_Cmd(I2C_Type* I2Cx, FunctionalState NewState)
214 {
215 /* Check the parameters */
216 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
217 assert_param(IS_FUNCTIONAL_STATE(NewState));
218
219 if (NewState != DISABLE) {
220 /* Enable the selected I2C peripheral */
221 I2Cx->CR_b.PE = SET;
222 }
223 else {
224 /* Disable the selected I2C peripheral */
225 I2Cx->CR_b.PE = RESET;
226 }
227 }
228
229
237 void I2C_BeginTransaction(I2C_Type* I2Cx, I2C_TransactionType* tr)
238 {
239
240 /* Check the parameters */
241 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
242 assert_param(IS_I2C_OPERATION(tr->Operation));
243 assert_param(IS_I2C_STARTBYTE(tr->StartByte));
244 assert_param(IS_I2C_ADDRESSTYPE(tr->AddressType));
245 assert_param(IS_I2C_OWN_ADDRESS1(tr->Address));
246 assert_param(IS_I2C_STOPCONDITION(tr->StopCondition));
247 assert_param(IS_I2C_LENGTH(tr->Length));
248
249 I2Cx->MCR = ((uint32_t)(tr->Operation)) | (((uint32_t)(tr->Address)) << 1) |
250 ((uint32_t)(tr->StartByte)) | ((uint32_t)(tr->AddressType)) |
251 ((uint32_t)(tr->StopCondition)) | (((uint32_t)(tr->Length)) << 15);
252
253 }
254
255
263 void I2C_GeneralCallCmd(I2C_Type* I2Cx, FunctionalState NewState)
264 {
265 /* Check the parameters */
266 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
267 assert_param(IS_FUNCTIONAL_STATE(NewState));
268 if (NewState != DISABLE) {
269 /* Enable generall call */
270 I2Cx->CR_b.SGCM = SET;
271 }
272 else {
273 /* Disable generall call */
274 I2Cx->CR_b.SGCM = RESET;
275 }
276 }
277
305 void I2C_ITConfig(I2C_Type* I2Cx, uint32_t I2C_IT, FunctionalState NewState)
306 {
307 /* Check the parameters */
308 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
309 assert_param(IS_FUNCTIONAL_STATE(NewState));
310 assert_param(IS_I2C_IT(I2C_IT));
311
312 if (NewState != DISABLE) {
313 /* Enable the selected I2C interrupts */
314 SET_BIT(I2Cx->IMSCR, I2C_IT);
315 }
316 else {
317 /* Disable the selected I2C interrupts */
318 CLEAR_BIT(I2Cx->IMSCR, I2C_IT);
319 }
320 }
321
328 void I2C_FillTxFIFO(I2C_Type* I2Cx, uint8_t Data)
329 {
330 /* Check the parameters */
331 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
332 /* Write in the DR register the data to be sent */
333 I2Cx->TFR = (uint32_t)Data;
334 }
335
341 uint8_t I2C_ReceiveData(I2C_Type* I2Cx)
342 {
343 /* Check the parameters */
344 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
345 /* Return the data in the DR register */
346 return I2Cx->RFR_b.RDATA;
347 }
348
349
355 void I2C_FlushTx(I2C_Type* I2Cx)
356 {
357 /* Check the parameters */
358 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
359 /* Set flush tx flag */
360 I2Cx->CR_b.FTX = SET;
361 }
362
363
369 I2C_OpStatus I2C_WaitFlushTx(I2C_Type* I2Cx)
370 {
371 /* Check the parameters */
372 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
373
374 /* Wait the flush of TX FIFO is completed */
375 if(I2Cx->CR_b.FTX == SET) {
376 return I2C_OP_ONGOING;
377 }
378 else {
379 return I2C_OP_OK;
380 }
381 }
382
383
389 void I2C_FlushRx(I2C_Type* I2Cx)
390 {
391 /* Check the parameters */
392 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
393 /* Set flush rx flag */
394 I2Cx->CR_b.FRX = SET;
395 }
396
397
403 I2C_OpStatus I2C_WaitFlushRx(I2C_Type* I2Cx)
404 {
405 /* Check the parameters */
406 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
407
408 /* Wait the flush of TX FIFO is completed */
409 if(I2Cx->CR_b.FRX == SET) {
410 return I2C_OP_ONGOING;
411 }
412 else {
413 return I2C_OP_OK;
414 }
415 }
416
423 void I2C_SetTxThreshold(I2C_Type* I2Cx, uint16_t TxThres)
424 {
425 /* Check the parameters */
426 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
427 assert_param(IS_I2C_TX_THRESHOLD(TxThres));
428
429 /* Set the Tx FIFO Threshold */
430 I2Cx->TFTR_b.THRESH_TX = TxThres;
431 }
432
438 void I2C_SetRxThreshold(I2C_Type* I2Cx, uint16_t RxThres)
439 {
440 /* Check the parameters */
441 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
442 assert_param(IS_I2C_RX_THRESHOLD(RxThres));
443
444 /* Set the Rx FIFO Threshold */
445 I2Cx->RFTR_b.THRESH_RX = RxThres;
446 }
447
448
454 void I2C_GenerateStopCondition(I2C_Type* I2Cx)
455 {
456 /* Check the parameters */
457 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
458
459 /* Generate a stop condition */
460 I2Cx->CR_b.FS_1 = SET;
461 }
462
469 void I2C_SetHoldTime(I2C_Type* I2Cx, uint16_t I2C_HoldTime)
470 {
471 /* Check the parameters */
472 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
473 assert_param(IS_I2C_HOLDTIME(I2C_HoldTime));
474
475 I2Cx->THDDAT = I2C_HoldTime;
476 }
477
484 void I2C_SetHoldTimeStartCondition(I2C_Type* I2Cx, uint16_t I2C_HoldTime)
485 {
486 /* Check the parameters */
487 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
488 assert_param(IS_I2C_HOLDTIME(I2C_HoldTime));
489
490 /* Standard mode */
491 if(I2Cx->CR_b.SM == I2C_CR_SM_STD) {
492 I2Cx->THDSTA_FST_STD_b.THDSTA_STD = I2C_HoldTime;
493 }
494 else if(I2Cx->CR_b.SM == I2C_CR_SM_FAST) {
495 I2Cx->THDSTA_FST_STD_b.THDSTA_FST = I2C_HoldTime;
496 }
497 }
498
525 ITStatus I2C_GetITStatus(I2C_Type* I2Cx, uint32_t I2C_IT)
526 {
527 /* Check the parameters */
528 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
529 assert_param(IS_I2C_IT(I2C_IT));
530
531 /* Check the status of the specified I2C flag */
532 if (READ_BIT(I2Cx->RISR, I2C_IT) != (uint32_t)RESET) {
533 /* I2C_IT is set */
534 return SET;
535 }
536 else {
537 /* I2C_IT is reset */
538 return RESET;
539 }
540 }
541
568 ITStatus I2C_GetITPendingBit(I2C_Type* I2Cx, uint32_t I2C_IT)
569 {
570 /* Check the parameters */
571 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
572 assert_param(IS_I2C_IT(I2C_IT));
573
574 /* Check the status of the specified I2C flag */
575 if (READ_BIT(I2Cx->MISR, I2C_IT) != (uint32_t)RESET) {
576 /* I2C_IT is set */
577 return SET;
578 }
579 else {
580 /* I2C_IT is reset */
581 return RESET;
582 }
583 }
584
585
611 void I2C_ClearITPendingBit(I2C_Type* I2Cx, uint32_t I2C_IT)
612 {
613 /* Check the parameters */
614 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
615 assert_param(IS_I2C_IT(I2C_IT));
616 /* Clear the selected I2C flags */
617 WRITE_REG(I2Cx->ICR, I2C_IT);
618 }
619
620
626 I2C_OpStatus I2C_GetStatus(I2C_Type* I2Cx)
627 {
628 /* Check the parameters */
629 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
630
631 /* Read the OP status field of the status register */
632 return (I2C_OpStatus)I2Cx->SR_b.STATUS;
633 }
634
635
636
648 void I2C_DMACmd(I2C_Type* I2Cx, uint16_t I2C_DMAReq, FunctionalState NewState)
649 {
650 /* Check the parameters */
651 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
652 assert_param(IS_I2C_DMAREQ(I2C_DMAReq));
653 assert_param(IS_FUNCTIONAL_STATE(NewState));
654
655 if (NewState != DISABLE)
656 {
657 /* Enable the DMA transfer */
658 I2Cx->CR |= I2C_DMAReq;
659 }
660 else
661 {
662 /* Disable the DMA transfer */
663 I2Cx->CR &= ~I2C_DMAReq;
664 }
665 }
666
674 void I2C_DMATxBurstMode(I2C_Type* I2Cx, FunctionalState NewState)
675 {
676 /* Check the parameters */
677 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
678 assert_param(IS_FUNCTIONAL_STATE(NewState));
679
680 if (NewState != DISABLE)
681 {
682 /* Enable the TX DMA burst mode */
683 I2Cx->DMAR_b.BURST_TX = SET;
684 }
685 else
686 {
687 /* Disable the TX DMA burst mode */
688 I2Cx->DMAR_b.BURST_TX = RESET;
689 }
690 }
691
699 void I2C_DMATxBurstSize(I2C_Type* I2Cx, uint8_t I2C_BurstSize)
700 {
701 /* Check the parameters */
702 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
703 assert_param(IS_I2C_BURSTSIZE(I2C_BurstSize));
704
705 I2Cx->DMAR_b.DBSIZE_TX = I2C_BurstSize;
706 }
707
708
721 /******************* (C) COPYRIGHT 2016 STMicroelectronics *****END OF FILE****/
IS_I2C_STARTBYTE
#define IS_I2C_STARTBYTE(SB)
Definition: BlueNRG1_i2c.h:197
I2C_GetITStatus
ITStatus I2C_GetITStatus(I2C_Type *I2Cx, uint32_t I2C_IT)
Checks whether the specified I2C interrupt has occurred or not.
Definition: BlueNRG1_i2c.c:525
IS_I2C_ALL_PERIPH
#define IS_I2C_ALL_PERIPH(I2CX)
Definition: BlueNRG1_i2c.h:120
BlueNRG1_i2c.h
This file contains all the functions prototypes for the I2C firmware library.
I2C_DMATxBurstMode
void I2C_DMATxBurstMode(I2C_Type *I2Cx, FunctionalState NewState)
Enables or disables the I2C TX DMA burst mode.
Definition: BlueNRG1_i2c.c:674
I2C_Cmd
void I2C_Cmd(I2C_Type *I2Cx, FunctionalState NewState)
Enables or disables the specified I2C peripheral.
Definition: BlueNRG1_i2c.c:213
I2C_SetHoldTimeStartCondition
void I2C_SetHoldTimeStartCondition(I2C_Type *I2Cx, uint16_t I2C_HoldTime)
Set the hold time value for start condition.
Definition: BlueNRG1_i2c.c:484
I2C_GetStatus
I2C_OpStatus I2C_GetStatus(I2C_Type *I2Cx)
Get the present state of the operation executed by I2C block.
Definition: BlueNRG1_i2c.c:626
I2C_OperatingMode_Slave
#define I2C_OperatingMode_Slave
Definition: BlueNRG1_i2c.h:161
IS_I2C_OWN_ADDRESS1
#define IS_I2C_OWN_ADDRESS1(ADDRESS1)
Definition: BlueNRG1_i2c.h:274
I2C_SetTxThreshold
void I2C_SetTxThreshold(I2C_Type *I2Cx, uint16_t TxThres)
Sets the transmit FIFO threshold by the I2Cx peripheral.
Definition: BlueNRG1_i2c.c:423
I2C_InitType::I2C_ClockSpeed
uint32_t I2C_ClockSpeed
Definition: BlueNRG1_i2c.h:51
I2C_DeInit
void I2C_DeInit(I2C_Type *I2Cx)
Deinitializes the I2C peripheral registers to their default reset values.
Definition: BlueNRG1_i2c.c:96
I2C_Filtering_Off
#define I2C_Filtering_Off
Definition: BlueNRG1_i2c.h:142
I2C_BeginTransaction
void I2C_BeginTransaction(I2C_Type *I2Cx, I2C_TransactionType *tr)
Start an I2C transaction sending the frame specified.
Definition: BlueNRG1_i2c.c:237
I2C_TransactionType::Address
uint16_t Address
Definition: BlueNRG1_i2c.h:76
I2C_ClearITPendingBit
void I2C_ClearITPendingBit(I2C_Type *I2Cx, uint32_t I2C_IT)
Clears the I2Cx interrupt pending bits.
Definition: BlueNRG1_i2c.c:611
I2C_SetRxThreshold
void I2C_SetRxThreshold(I2C_Type *I2Cx, uint16_t RxThres)
Sets the receive FIFO threshold by the I2Cx peripheral.
Definition: BlueNRG1_i2c.c:438
I2C_GenerateStopCondition
void I2C_GenerateStopCondition(I2C_Type *I2Cx)
Generate a stop condition.
Definition: BlueNRG1_i2c.c:454
I2C_WaitFlushTx
I2C_OpStatus I2C_WaitFlushTx(I2C_Type *I2Cx)
Return the status of the TX FIFO flush operation.
Definition: BlueNRG1_i2c.c:369
I2C_SLAVE_ADDR_EXT10_SMK
#define I2C_SLAVE_ADDR_EXT10_SMK
Definition: BlueNRG1_i2c.c:54
I2C_ITConfig
void I2C_ITConfig(I2C_Type *I2Cx, uint32_t I2C_IT, FunctionalState NewState)
Enables or disables the specified I2C interrupts.
Definition: BlueNRG1_i2c.c:305
I2C_GetITPendingBit
ITStatus I2C_GetITPendingBit(I2C_Type *I2Cx, uint32_t I2C_IT)
Checks whether the specified I2C interrupt has occurred or not.
Definition: BlueNRG1_i2c.c:568
I2C_ReceiveData
uint8_t I2C_ReceiveData(I2C_Type *I2Cx)
Returns the most recent received data by the I2Cx peripheral.
Definition: BlueNRG1_i2c.c:341
I2C_InitType::I2C_Filtering
uint8_t I2C_Filtering
Definition: BlueNRG1_i2c.h:57
I2C_OpStatus
I2C_OpStatus
I2C operation status enumeration.
Definition: BlueNRG1_i2c.h:95
IS_I2C_DMAREQ
#define IS_I2C_DMAREQ(DMAREQ)
Definition: BlueNRG1_i2c.h:303
I2C_StructInit
void I2C_StructInit(I2C_InitType *I2C_InitStruct)
Fills the I2C_InitStruct with default values.
Definition: BlueNRG1_i2c.c:187
I2C_CR_SM_STD
#define I2C_CR_SM_STD
Definition: BlueNRG1_i2c.c:47
IS_I2C_ADDRESSTYPE
#define IS_I2C_ADDRESSTYPE(AT)
Definition: BlueNRG1_i2c.h:213
I2C_TransactionType::Length
uint16_t Length
Definition: BlueNRG1_i2c.h:87
I2C_TransactionType::AddressType
uint16_t AddressType
Definition: BlueNRG1_i2c.h:81
I2C_DMACmd
void I2C_DMACmd(I2C_Type *I2Cx, uint16_t I2C_DMAReq, FunctionalState NewState)
Enables or disables the I2C DMA interface.
Definition: BlueNRG1_i2c.c:648
I2C_OP_OK
Definition: BlueNRG1_i2c.h:98
I2C_WaitFlushRx
I2C_OpStatus I2C_WaitFlushRx(I2C_Type *I2Cx)
Return the status of the RX FIFO flush operation.
Definition: BlueNRG1_i2c.c:403
IS_I2C_OPERATING_MODE
#define IS_I2C_OPERATING_MODE(MODE)
Definition: BlueNRG1_i2c.h:166
I2C_SetHoldTime
void I2C_SetHoldTime(I2C_Type *I2Cx, uint16_t I2C_HoldTime)
Set the hold time value for data transfer.
Definition: BlueNRG1_i2c.c:469
IS_I2C_TX_THRESHOLD
#define IS_I2C_TX_THRESHOLD(TXTHR)
Definition: BlueNRG1_i2c.h:130
I2C_InitType::I2C_ExtendAddress
FunctionalState I2C_ExtendAddress
Definition: BlueNRG1_i2c.h:63
I2C_InitType
Structure definition of I2C initialization.
Definition: BlueNRG1_i2c.h:49
I2C_OP_ONGOING
Definition: BlueNRG1_i2c.h:97
I2C_FlushRx
void I2C_FlushRx(I2C_Type *I2Cx)
Returns the most recent received data by the I2Cx peripheral.
Definition: BlueNRG1_i2c.c:389
IS_I2C_OPERATION
#define IS_I2C_OPERATION(OP)
Definition: BlueNRG1_i2c.h:182
I2C_FlushTx
void I2C_FlushTx(I2C_Type *I2Cx)
Returns the most recent received data by the I2Cx peripheral.
Definition: BlueNRG1_i2c.c:355
I2C_CR_SM_FAST
#define I2C_CR_SM_FAST
Definition: BlueNRG1_i2c.c:50
IS_I2C_HOLDTIME
#define IS_I2C_HOLDTIME(TIME)
Definition: BlueNRG1_i2c.h:325
IS_I2C_LENGTH
#define IS_I2C_LENGTH(P)
Definition: BlueNRG1_i2c.h:232
IS_I2C_STOPCONDITION
#define IS_I2C_STOPCONDITION(P)
Definition: BlueNRG1_i2c.h:229
I2C_TransactionType::Operation
uint16_t Operation
Definition: BlueNRG1_i2c.h:73
IS_I2C_BURSTSIZE
#define IS_I2C_BURSTSIZE(SIZE)
Definition: BlueNRG1_i2c.h:314
I2C_InitType::I2C_OwnAddress1
uint16_t I2C_OwnAddress1
Definition: BlueNRG1_i2c.h:60
I2C_Init
void I2C_Init(I2C_Type *I2Cx, I2C_InitType *I2C_InitStruct)
Initializes the I2Cx peripheral according to the specified parameters in the I2C_InitStruct.
Definition: BlueNRG1_i2c.c:117
IS_I2C_RX_THRESHOLD
#define IS_I2C_RX_THRESHOLD(RXTHR)
Definition: BlueNRG1_i2c.h:132
IS_I2C_CLOCK_SPEED_I2C
#define IS_I2C_CLOCK_SPEED_I2C(SPEED)
Definition: BlueNRG1_i2c.h:290
I2C_TransactionType::StopCondition
uint16_t StopCondition
Definition: BlueNRG1_i2c.h:84
I2C_InitType::I2C_OperatingMode
uint8_t I2C_OperatingMode
Definition: BlueNRG1_i2c.h:54
I2C_TransactionType::StartByte
uint16_t StartByte
Definition: BlueNRG1_i2c.h:78
IS_I2C_FILTERING
#define IS_I2C_FILTERING(FILTER)
Definition: BlueNRG1_i2c.h:148
I2C_GeneralCallCmd
void I2C_GeneralCallCmd(I2C_Type *I2Cx, FunctionalState NewState)
Enables or disables the general call feature.
Definition: BlueNRG1_i2c.c:263
I2C_FillTxFIFO
void I2C_FillTxFIFO(I2C_Type *I2Cx, uint8_t Data)
Fills the Tx FIFO with the specified data byte.
Definition: BlueNRG1_i2c.c:328
I2C_CLOCK
#define I2C_CLOCK
Definition: BlueNRG1_i2c.c:52
I2C_DMATxBurstSize
void I2C_DMATxBurstSize(I2C_Type *I2Cx, uint8_t I2C_BurstSize)
Set the number of burst of data. If this number is smaller than the transaction length, only one single request are generated.
Definition: BlueNRG1_i2c.c:699
IS_I2C_IT
#define IS_I2C_IT(IT)
Definition: BlueNRG1_i2c.h:263
I2C_TransactionType
Structure definition of I2C transaction initialization.
Definition: BlueNRG1_i2c.h:72